Lower nonlinear distortion, higher efficiency, and a wider bandwidth are required for a power amplifier. Presently, it is normal to increase efficiency with a Doherty amplifier and to perform distortion compensation by DPD (Digital Pre-Distortion).
For example, cell phones of 3G and later models use signals with a high PAPR (Peak to Average Power ratio), such as WCDMA (Wideband Code Division Multiple Access) signals and OFDM (Orthogonal Frequency Division Multiplex) signals, and a bandwidth of the system is tens of MHz. Signals in a further wider bandwidth are used for 4G models. However, a Doherty amplifier requires back-off corresponding to a PAPR and there is a limit to an increase of efficiency. Also, because load modulation using a quarter-wave line is performed, it is difficult to widen the bandwidth.
Given these circumstances, a study is now being conducted for a method of operating an amplifier always in a near-saturated condition by controlling a power supply voltage of the amplifier according to an amplitude of a signal to be amplified. When this method is used, high efficiency is achieved because, ideally, there is no need of back-off. Also, because this method is independent of a frequency of a signal to be amplified, it is expected to widen the bandwidth. Examples of representative technique of this method include but not limited to the ET (Envelope Tracking) method and the EER (Envelope Elimination and Restoration) method.
FIG. 9 conceptually shows a configuration example of an amplifying device using the ET method.
An amplifying device of this example includes a PA (Power Amplifier) 101, an amplitude detection portion 102, and a PA power supply portion 103.
An input signal is an RF (Radio Frequency) signal that is a modulated signal having a high PAPR, such as a CDMA signal and an OFDM signal, superimposed on an RF carrier wave.
An example of an operation performed in this amplifying device using the ET method will be described.
An amplitude of an input signal is detected in the amplitude detection portion 102. The PA power supply portion 103 controls magnitude of a power supply voltage to be given to the PA 101 according to magnitude of the detected amplitude. Upon input of the input signal, the PA 101 amplifies power and outputs an output signal.
In this instance, the operation is timed by inserting a delay circuit (not shown) on an input side or a power supply side of the PA 101 as the need arises so that the PA 101 supplies power supply corresponding to the amplitude of the input signal.
As an example to achieve this amplifying device, a diode detector is used as the amplitude detection portion 102, a class D amplifier is used as the PA power supply portion 103, and an FET (Field Effect Transistor) or a bipolar transistor is used as the PA 101. Besides this example, the amplifying device can be achieved using various known techniques.
FIG. 10 conceptually shows a configuration example of an amplifying device using the EER method.
This amplifying device includes a power amplification portion (PA) 101, an amplitude detection portion 102, a PA power supply portion 103, and a phase detection portion (for example, a limiter) 111.
Herein, a schematic difference from the amplifying device using the ET method shown in FIG. 9 is that the phase detection portion 111 is provided on an input side of the PA 101.
An example of an operation performed in this amplifying device using the EER method will now be described.
The phase detection portion 111 removes amplitude information of an input signal and extracts phase information alone that is outputted to the PA 101. This example utilizes a property that a gain of the PA 101 varies with a voltage applied from the PA power supply portion 103 and the amplitude information is restored in an output signal from the PA 101.
As an example to achieve this amplifying device, a saturated amplifier is used as the phase detection portion 111. Also, because an input signal is a regular envelope signal herein, a class C amplifier can be used as the PA 101. Besides this example, the amplifying device can be achieved using various known techniques.
FIG. 11 shows comparative examples to compare a conventional method (fixed voltage) with the ET method and the EER method.
The abscissa of the graph represents a time (Time) and the ordinate represents a drain voltage (VDD) applied to the FET by way of example.
In the conventional method, a fixed power supply voltage (Fixed VDD) matched with the maximum power is applied to the FET. On the contrary, in the ET method and the EER method, a power supply voltage corresponding to the amplitude (Envelope indicated by a dotted line) of an input signal is applied to the FET so that the amplifier (PA) operates in a near-saturated condition. Hence, a supply voltage can be reduced by a shaded portion shown in FIG. 11. In short, because a supply of power to the PA 101 can be reduced, efficiency is increased.
Herein, examples using the ET method and the EER method above have described a method of achieving the amplifying device for analog signals.
A method of achieving an amplifying device for digital signals will now be described.
FIG. 12 conceptually shows a configuration example of an amplifying device adopting a digital method and using the ET method or the EER method.
This amplifying device includes a phase detection portion (for example, a limiter) 121 that is not provided in the ET method and provided in the EER method, a D-to-A (Digital to Analog) converter 122, another D-to-A converter 123, a quadrature modulation portion 124, a power amplification portion (PA) 125, an amplitude detection portion 126, a still another D-to-A converter 127, and a PA power supply portion 128.
Herein, functions furnished to the power amplification portion (PA) 125, the amplitude detection portion 126, the PA power supply portion 128, and the phase detection portion 121 are the same as those in the cases for the analog method shown in FIG. 9 and FIG. 10. A difference from the analog method shown in FIG. 9 and FIG. 10 is that the D-to-A converters 122, 123, and 127 and the quadrature modulation portion 124 are provided.
An example of an operation performed in this amplifying device will be described.
An input signal includes digital signals I(t) and Q(t) of an I-phase and a Q-phase, respectively.
The amplitude detection portion 126 is provided to a digital portion and finds an instantaneous amplitude Env(t) in accordance with (Equation 1) below and outputs the result. Herein, Env(t), I(t), and Q(t) are functions of a time t.[Formula 1]Env(t)=√{square root over (I2(t)+Q2(t))}{square root over (I2(t)+Q2(t))}  (Equation 1)
An output signal from the amplitude detection portion 126 in the form of a digital signal is converted to an analog signal in the D-to-A converter 127. The PA power supply portion 128 is the same as the counterpart of the analog method.
Also, in the case of the EER method, input signals are inputted into the D-to-A converters 122 and 123 after they are sent to the phase detection portion 121. In the case of the ET method, the phase detection portion 121 is omitted and input signals are inputted into the D-to-A converters 122 and 123.
The phase detection portion 121 finds an instantaneous phase θ(t) in accordance with (Equation 2) below and outputs a signal I′(t) expressed by (Equation 3) below to the D-to-A converter 122 and a signal Q′ (t) expressed by (Equation 4) below to the D-to-A converter 123. Herein, θ(t), I(t), Q(t), I′(t), and Q′(t) are functions of a time (t) and AFIX is a fixed amplitude.[Formula 2]θ(t)=tan−1(Q(t)/I(t))  (Equation 2)[Formula 3]I′(t)=AFIX·cos(θ(t)  (Equation 3)[Formula 4]Q′(t)=AFIX·sin(θ(t))  (Equation 4)
In the case of the ET method, each of the D-to-A converter 122 corresponding to the I-phase and the D-to-A converter 123 corresponding to the Q-phase converts an input signal in the form of a digital signal to an analog signal and outputs the resulting signal to the quadrature modulation portion 124. In the case of the EER method, each converts an output signal from the phase detection portion 121 in the form of a digital signal to an analog signal and outputs the resulting signal to the quadrature modulation portion 124.
The quadrature modulation portion 124 applies quadrature modulation to signals from the D-to-A converters 122 and 123 and outputs the resulting signal to the PA 125. The PA 125 amplifies power of the signal from the quadrature modulation portion 124.
A frequency converter (up converter) is normally provided between the quadrature modulation portion 124 and the PA 125 depending on a radio frequency. However, this frequency converter is not shown in FIG. 12.